Install QtRvSim

About QtRvSim

RISC-V CPU simulator for education purposes

What's new in 0.9.8

- Machine: aclintmtimer fix count type - GUI: fix a crash on nonexistent include - Use win32 config of libelf when compiling natively for Windows - CI: Add Windows Clang debug build and macos ARM - CLI: reporter dump to json - Machine: instruction parsing refactor - GUI: make printer settings persistent and scale to fit PDF page size - Assembler: fix immediate parsing - Assembler: implement GAS modifiers - PC rel still basic only - Machine: fix zext.w/h inst parse and fix tokenized for inst.xxx - Machine: fix parse_csr_address and CSR::RegisterMapByName key type - Machine and GUI: Pseudo LRU cache policy - Add 25x speed for teaching convenience - Machien and GUI: Include Jiri Stefan's work on branch predictor - Machien and GUI: BTB, BHT and BHR are implemented - Project: Explicit cmake qt major version option - Packaging: add Keywords entry into desktop file - Machine: add peripherals high/top address aliases for XLEN=64 - GUI: switch "New" dialog page selection to tree widget, polishing required For Ubuntu use https://launchpad.net/~qtrvsimteam/+archive/ubuntu/ppa For SUSE, Fedora and Debian https://software.opensuse.org/download.html?project=home%3Ajdupak&package=qtrvsim For Arch https://aur.archlinux.org/pkgbase/qtrvsim WebAssembly online version https://comparch.edu.cvut.cz/qtrvsim/app QtRvSim articles, presentations and their recordings as well as more about Computer Architectures courses at the Czech Technical University in Prague are presented at https://comparch.edu.cvut.cz/ The educational VHDL RISC-V core modeled according to the QtRvSim (single cycle and 5-stage...

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