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Install NVC VHDL Simulator

A free software VHDL compiler and simulator implementing almost all of IEEE 1076-2008.

Install with winget
winget install --id NickGasson.NVC
Upgrade
winget upgrade --id NickGasson.NVC
Uninstall
winget uninstall --id NickGasson.NVC

About NVC VHDL Simulator

A free software VHDL compiler and simulator implementing almost all of IEEE 1076-2008.

What's new in 1.20.1

This is a minor bug fix release addressing several issues that were found in 1.20.0: - Fix a crash while evaluating matching relational operator with constant arguments (#1495). - Fixed several regressions in coverage report generation (#1490, #1494). - Several other minor bugs were resolved (#1498, #1505, #1512, #1496). Special thank you to @bpadalino, @tmeissner, @Blebowski, @amb5l, @m42uko, @a-panella, @cmarqu, @albydnc, @johonkanen, and @augustofg for sponsoring me!

Read release notes

Version history

Version Updated Notes
1.20.1 Unknown This is a minor bug fix release addressing several issues that were found in 1.20.0: - Fix a crash while evaluating matching relational operator with constant arguments (#1495). - Fixed several regressions in coverage re...
1.20.0 Unknown This is a major new release with much improved Verilog and mixed-language support and the following changes: - The new vhpi_ext_nvc.h header contains definitions for proprietary VHPI extensions. - Added a vhpiRandomSeedP...
1.19.3 Unknown This is a minor bug fix release with the following changes: - VHPI value change callbacks for indexed names now work correctly (#1428). - Added support for iterating physical unit declarations in VHPI (#1437). - VHPI ret...
1.19.2 Unknown This is a minor bug fix release with the following changes: - Fixed a crash when dumping a waveform --dump-arrays and the design contains a null array of records (#1420). - Fixed an error when setting generics on the com...
1.19.1 Unknown This is a minor bug fix release with the following changes: - Fixed a fatal error when a design unit instantiated multiple times inside a generate statement contains a PSL assertion (#1400). - Fixed a crash when no comma...
1.19.0 Unknown This is a major new release with the following changes: - PSL next_e and next_e! operators and the nondet built-in function are now supported. - The --precompile elaboration option which was deprecated in the last releas...
1.18.2 Unknown This is a minor bug fix release with the following changes: - Fixed a mis-optimisation which would cause the result of x * x to be zero (#1338, from @Blebowski). - Several other minor bugs were resolved (#1239, #1332, #1...
1.18.1 Unknown This is a minor bug fix release with the following changes: - Fixed a crash when compiling with AVX2 enabled (#1311). - Calling vhpi_get(vhpiBaseType, ..) on a subtype with additional constraints such as natural range 0...
1.18.0 Unknown The main focus of this release has been improving support Verilog and mixed-language simulation and some non-trivial designs can now be simulated, for example axis2mm from ZipCPU. Additionally: - Scheduling of blocking a...
1.17.2 Unknown This is a minor bug fix release with the following changes: - Fixed an issue where sub-elements of a port with 'converse record mode view would have the wrong direction when the port was partially associated. - Package i...
1.17.1 Unknown This is a minor bug fix release with the following changes: - Fixed a build failure on Linux Arm64 (#1246). - An others choice is now allowed in an unconstrained array aggregate if the --relaxed option is passed and the...
1.17.0 Unknown This release contains significant improvements to the experimental Verilog and mixed-language simulation, although it's still a very long way from being production ready. Additionally: - Updated to OSVVM 2025.02 and UVVM...
1.16.2 Unknown This is a minor bug fix release: - Fixed a crash when an entity uses VHDL-2019 enhanced type generics and sub-elements of a port with a generic array type are associated individually (#1201). - Fixed an issue where some...
1.16.1 Unknown This is a minor bug fix release: - Fixed an elaboration failure where generic names differ in case between entity and component and the files were analysed with --preserve-case (#1195). - Fixed a crash when expression co...
1.16.0 Unknown This is a major new release with the following changes: - Added support for PSL prev(), stable(), rose() and fell() built-in functions (#1135). - Signals can now be read and passed to subprograms during elaboration and t...
1.15.2 Unknown This is a minor maintenance release fixing the following issues: - Fixed invalid LLVM IR generation which could cause a crash with LLVM 14 (#1145). - Functional coverage is now reported correctly when summing from nested...
1.15.1 Unknown This is a minor maintenance release fixing the following issues: - Fixed a crash when a subprogram is called with too many named arguments (from @NikLeberg) (#1091). - Fixed a crash when a constant record aggregate has a...
1.15.0 Unknown This is a major new release with the following changes: - --load is now a global option and should be placed before the -r command. This allows VHPI foreign subprograms to be called during elaboration (#988). - The --per...
1.14.2 Unknown This is a minor bug fix release with the following changes: - Fixed a crash when 'last_value is used with record types (#1043). - Fixed a crash when a process sensitivity list contains an external name and the process is...
1.14.1 Unknown This is a minor bug fix release with the following changes: - Fixed an error when using the work library alias and the working library has the same name as design unit being analysed (#991). - Added a check for illegal r...